Getting Started
The best way to get started with Hardcaml is by trying out the open-source Hardcaml Template Project, which provides an example RTL design, as well as infrastructure for running testbenches (with waveforms) and generating Verilog/VHDL for synthesis.
Ready to target your designs to run on Xilinx boards? Check out Hardcaml Hobby Boards (and included Demo Projects) for easy generation of constraint files and build scripts.
For more examples and API documentation, check out the Hardcaml Docs
Hardcaml Libraries
Design
- Hardcaml Circuits - Some common modules that are useful across projects
- Hardcaml AXI - AXI conversion and register-interface generation utilities
- Hardcaml Fixed Point - Generator for performant fixed-point arithmetic functions
- Hardcaml Xilinx - Parametrized wrappers and simulation models for hard primitives in Xilinx FPGAs
Verification
- Step Testbench - A library for writing multi-process testbenches
- Event-Driven Simulator - An event-based multi-clock simulator, entirely within OCaml
- Waveterm - A library for generating ASCII waveforms in tests + an interactive viewer for debugging
- Hardcaml Verilator - Integration with Verilator for higher-performance sims
- Hardcaml Verify - Tools for defining and running formal-verification tests from OCaml