Hardcaml

Let’s talk about what this means!

Hardcaml strives to support all four major steps in a hardware-design flow:

Design

Hardcaml allows expressing hardware designs entirely within OCaml, leveraging higher-order functions like lists and maps to programmatically generate complex logic. Hardcaml's strong type system ensures safety by construction (providing static checking at compile-time but zero overhead in the generated circuits). The powerful functor system enables a level of reuse impossible in traditional HDLs: parametrizing high-level designs over underlying implementations and datatypes, allowing for true modularity without sacrificing control. And being embedded in OCaml makes it easy to write application-specific DSLs to support higher-level design abstractions where desirable.

Verification

Hardcaml integrates simulation directly into the OCaml runtime, allowing testbenches to benefit from the power of a fully-featured software language. This allows easily sharing types between hardware and software, and makes available powerful libraries like Quickcheck for constrained-random testing. Inline ASCII waveforms & expect-tests make it easy to document subtle timing behaviors and ensure they stay in sync with reality, while integration with standard waveform viewers is available for deeper debugging sessions. Formal verification is also available through integration with SAT solvers and industry-standard simulation toolkits.

Optimization

Hardcaml allows you to control every register and wire in a design, providing predictable generated RTL and making it easy to map from synthesis results back to the underlying Hardcaml source code. Parameterizing a design using functors and metaprogramming allows an engineer to sweep through architectural trade-offs without rewriting the entire codebase. The ability to build custom DSLs also makes it easy to separate high-level requirements from implementation-specific optimizations.

Integration

Hardcaml simplifies the hardware-software boundary by allowing drivers to be written in the same language as the RTL. The high-performance OxCaml compiler means this doesn't come at the cost of speed. Because hardware register interfaces and memory maps are generated directly from driver code, hardware and software don't drift out of sync. By abstracting over the low-level hardware interface, software engineers can develop and test their driver code against simulated hardware, then deploy the exact same code to production systems with confidence.

Using Hardcaml

Hardcaml is open-source and available via opam. We are excited to see what the community builds with it, from retro-computing projects to high-performance accelerators.

Hardcaml is intended to be easy to adopt for hardware engineers while leveraging the benefits of the OCaml ecosystem. It comes with a suite of developer tools, including:

• PPX extensions for concise syntax and minimal boilerplate
• Interactive waveform viewer for rapid debugging
• Integration with editor tooling like Dune, Merlin, and OCaml-LSP
• Example projects for quickly getting started on different platforms

Jane Street uses Hardcaml in production for some of our most critical ultra-low-latency trading systems. We have open-sourced the core libraries and tools we use every day, and we continue to release more components regularly.

The Hardcaml Ecosystem

Check out some recent projects and tools built using Hardcaml:

• We received over 150 Hardcaml-based submissions from the community during our 2025 Advent of FPGA competition
• Hardcaml ZPrize, an award-winning implementation of MSM and NTT by the Hardcaml team
• Hardcaml Hobby Boards, a framework for integrating with Xilinx boards
• OCaml All the Way Down talk